| No. | Partie # | Fabricant | Description | Fiche Technique |
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Etron Technology Inc. |
8Mega x 16bits SDRAM • Fast access time from clock: 4.5/5/5.4 ns • Fast clock rate: 200/166/143 MHz • Fully synchronous operation • Internal pipelined architecture • 2M word x 16-bit x 4-bank • Programmable Mode registers - CAS Latency: 2, or 3 - Burst Length: 1, 2, 4, 8 |
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Etron Technology Inc. |
4M x 16 DDR Synchronous DRAM (SDRAM) Fast clock rate: 300/285/250/200/166/143/125MHz Differential Clock CK & /CK Bi-directional DQS DLL enable/disable by EMRS Fully synchronous operation Internal pipeline architecture Four internal banks, 1M x 16-bit for each bank Programmable Mode and |
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Etron Technology Inc. |
512K x 32 High Speed Synchronous Graphics DRAM(SGRAM) • • • • • • Fast access time from clock: 5/5/5.5/6.5/7.5 ns Fast clock rate: 183/166/143/125/100 MHz Fully synchronous operation Internal pipelined architecture Dual internal banks(256K x 32-bit x 2-bank) Programmable Mode and Special Mode registers |
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Etron Technology Inc. |
1Mega x 32 SGRAM • • • • • • EM637327 1Mega x 32 SGRAM Preliminary (08/99) Pin Assignment (Top View) DQ29 VSSQ DQ30 DQ31 VSS NC NC NC NC NC NC NC NC NC NC V DD DQ0 DQ1 VSSQ DQ2 • • • • • • • • Fast access time from clock: 4.5/5.5/5.5/6 ns Fast clock rate: 200/166 |
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Etron Technology Inc. |
4M x 32 DDR SDRAM • Fast clock rate: 350/333/300/285/250/200 MHz • Differential Clock CK & CK# input • 4 Bi-directional DQS. Data transactions on both edges of DQS (1DQS / Byte) • DLL aligns DQ and DQS transitions • Edge aligned data & DQS output • Center aligned data |
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