No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
|
|
Texas Instruments |
Operational Amplifier •1 Overload Protection on the Input and Output • No Latch-Up When the Common-Mode Range is Exceeded 2 Applications • Comparators • Multivibrators • DC Amplifiers • Summing Amplifiers • Integrator or Differentiators • Active Filters 3 Description The |
|
|
|
Texas Instruments |
JFET Input Operational Amplifier •1 Advantages – Replace Expensive Hybrid and Module FET Op Amps – Rugged JFETs Allow Blow-Out Free Handling Compared With MOSFET Input Devices – Excellent for Low Noise Applications Using Either High or Low Source Impedance—Very Low 1/f Corner – Offs |
|
|
|
Texas Instruments |
Timer •1 Direct Replacement for SE555/NE555 • Timing from Microseconds through Hours • Operates in Both Astable and Monostable Modes • Adjustable Duty Cycle • Output Can Source or Sink 200 mA • Output and Supply TTL Compatible • Temperature Stability Bette |
|
|
|
Texas Instruments |
Family Precision 0-Delay Clock Conditioner 12 • Integrated VCO with Very Low Phase Noise Floor • Integrated Integer-N PLL with Outstanding Normalized Phase Noise Contribution of -224 dBc/Hz • VCO Divider Values of 2 to 8 (All Divides) – Bypassable with VCO Mux When Not in 0delay Mode • Channe |
|
|
|
ETCTI |
CMOS 18-Stage Static Shift Register |
|
|
|
ETCTI |
CMOS DUAL 4-BIT LATCH |
|
|
|
ETC |
CHEMICAL CONVERSION COATINGS or protection against corrosion where low electrical resistance is required. Comments, suggestions, or questions on this document should be addressed to: Commander, Naval Air Warfare Center Aircraft Division, Code 491000B120-3, Highway 547, Lakehurs |
|
|
|
ETC |
CHEMICAL CONVERSION COATINGS |
|
|
|
Texas Instruments |
Quadruple Operational Amplifier •1 Wide Supply Ranges – Single Supply: 3 V to 32 V – Dual Supplies: ±1.5 V to ±16 V • Low Supply-Current Drain Independent of Supply Voltage: 0.8 mA Typical • Common-Mode Input Voltage Range Includes Ground, Allowing Direct Sensing Near Ground • Low |
|
|
|
Texas Instruments |
Family Clock Jitter Cleaner 1 •23 Cascaded PLLatinum™ PLL Architecture – PLL1 – Redundant Reference Inputs – Loss of Signal Detection – Automatic and Manual Selection of Reference Clock Input – PLL2 – Phase Detector Rate up to 100 MHz – Input Frequency-Doubler – Integrated VCO |
|
|
|
Texas Instruments |
Family Clock Jitter Cleaner 1 •23 Cascaded PLLatinum™ PLL Architecture – PLL1 – Redundant Reference Inputs – Loss of Signal Detection – Automatic and Manual Selection of Reference Clock Input – PLL2 – Phase Detector Rate up to 100 MHz – Input Frequency-Doubler – Integrated VCO |
|
|
|
Texas Instruments |
Family Low-Noise Clock Jitter Cleaner 1 •23 Cascaded PLLatinum™ PLL Architecture – PLL1 – Phase Detector Rate of up to 40 MHz – Integrated Low-Noise Crystal Oscillator Circuit – Dual Redundant Input Reference Clock with LOS – PLL2 – Normalized [1 Hz] PLL Noise Floor of 224 dBc/Hz – Phase |
|
|
|
ETC |
CHEMICAL CONVERSION MATERIALS tion against corrosion, painted or unpainted. Class 3 - For protection against corrosion where low electrical resistance is required. Comments, suggestions, or questions on this document should be addressed to: Commander, Naval Air Warfare Center Air |
|
|
|
ETC |
Mid-Range Military/Aerospace Relays e Continuous Duty TYPE OF LOAD Resistive Inductive Motor Lamp LIFE (MIN.) CYCLES X 103 100 20 100 100 28 VDC 10 8 4 2 115VAC 400Hz 10 8 4 2 115/200VAC 30 400 Hz 60Hz * 10 8 4 2 2.5 2.5 2.0 1 * 60 Hz LOADS RATED FOR 10,000 OPERATIONS OVERLOAD CURRENT |
|
|
|
Texas Instruments |
Family Clock Jitter Cleaner 1 •23 Cascaded PLLatinum™ PLL Architecture – PLL1 – Redundant Reference Inputs – Loss of Signal Detection – Automatic and Manual Selection of Reference Clock Input – PLL2 – Phase Detector Rate up to 100 MHz – Input Frequency-Doubler – Integrated VCO |
|
|
|
Texas Instruments |
Family Low-Noise Clock Jitter Cleaner 1 •23 Cascaded PLLatinum™ PLL Architecture – PLL1 – Phase Detector Rate of up to 40 MHz – Integrated Low-Noise Crystal Oscillator Circuit – Dual Redundant Input Reference Clock with LOS – PLL2 – Normalized [1 Hz] PLL Noise Floor of 224 dBc/Hz – Phase |
|
|
|
ETC |
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Tiny Series |
|
|
|
ETCTI |
CMOS HEX VOLTAGE-LEVEL SHIFTER |
|
|
|
ETCTI |
CMOS DUAL BINARY TO 1 OF 4 DECODER/DEMULTIPLEXERS |
|
|
|
ETC |
MODEM DEVICE FAMILY FOR DESKTOP APPLICATIONS .............................................................................................................................................. 1-3 TECHNICAL OVERVIEW..................................................................................... |
|