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ETC CLV DataSheet

No. Partie # Fabricant Description Fiche Technique
1
CDCLVP1208

Texas Instruments
High-Performance Clock 2:8 Buffer

•1 2:8 Differential Buffer
• Selectable Clock Inputs Through Control terminal
• Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL
• Eight LVPECL Outputs
• Maximum Clock Frequency: 2 GHz
• Maximum Core Current Consumption: 73 mA
• Very Low Additi
Datasheet
2
CDCLVD1216

Texas Instruments
2:16 Low Additive Jitter LVDS Buffer
1
• 2:16 Differential Buffer
• Low Additive Jitter: <300 fs RMS in 10 kHz to 20 MHz
• Low Output Skew of 55 ps (Max)
• Universal Inputs Accept LVDS, LVPECL, LVCMOS
• Selectable Clock Inputs Through Control Pin
• 16 LVDS Outputs, ANSI EIA/TIA-644A Sta
Datasheet
3
CDCLVD1208

Texas Instruments
2:8 Low Additive Jitter LVDS Buffer

•1 2:8 Differential Buffer
• Low Additive Jitter: < 300-fs RMS in 10-kHz to 20-MHz
• Low Output Skew of 45 ps (Maximum)
• Universal Inputs Accept LVDS, LVPECL, and LVCMOS
• Selectable Clock Inputs Through Control Pin
• 8 LVDS Outputs, ANSI EIA/TIA-64
Datasheet
4
CDCLVP1212

Texas Instruments
High-Performance Clock Buffer

•1 2:12 Differential Buffer
• Selectable Clock Inputs Through Control Terminal
• Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL
• 12 LVPECL Outputs
• Maximum Clock Frequency: 2 GHz
• Maximum Core Current Consumption: 88 mA
• Very Low Additive
Datasheet
5
CDCLVP2102

Texas Instruments
High-Performance Clock Buffer

•1 Dual 1:2 Differential Buffer
• Two Clock Inputs
• Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL
• Four LVPECL Outputs
• Maximum Clock Frequency: 2 GHz
• Maximum Core Current Consumption: 48 mA
• Very Low Additive Jitter: <100 fs, RMS in 1
Datasheet
6
CDCLVP1216

Texas Instruments
High-Performance Clock Buffer

•1 2:16 Differential Buffer
• Selectable Clock Inputs Through Control Pin
• Universal Inputs Accept LVPECL, LVDS, and LVCMOS/LVTTL
• 16 LVPECL Outputs
• Maximum Clock Frequency: 2 GHz
• Maximum Core Current Consumption: 110 mA
• Very Low Additive Jit
Datasheet
7
CLV0625E

ETC
VOLTAGE CONTROLLED OSCILLATOR
ing and Grounding of VCOs
• AN-102 : Proper Output Loading of VCOs
• AN-107 : How to Solder Z-COMM VCOs NOTES: Phase Noise @ 100 kHz offset (1 Hz BW, max.): -124 dBc/Hz © Z-Comm unicati ons, Inc. Page 1 All rights reserved LOW COST - HIGH PERFOR
Datasheet
8
CDCLVP2104

Texas Instruments
High-Performance Clock Buffer

•1 Dual 1:4 Differential Buffer
• Two Clock Inputs
• Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL
• Eight LVPECL Outputs
• Maximum Clock Frequency: 2 GHz
• Maximum Core Current Consumption: 78 mA
• Very Low Additive Jitter: <100 fs, RMS in
Datasheet
9
CDCLVP110

Texas Instruments
Low-Voltage 1:10 LVPECL/HSTL
1
• Distributes One Differential Clock Input Pair LVPECL/HSTL to 10 Differential LVPECL Clock Outputs
• Fully Compatible With LVECL/LVPECL/HSTL
• Single Supply Voltage Required, ±3.3-V or ±2.5-V Supply
• Selectable Clock Input Through CLK_SEL
• Low-O
Datasheet
10
CDCLVP1102

Texas Instruments
High-Performance Clock Buffer

•1 1:2 Differential Buffer
• Single Clock Input
• Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL
• Two LVPECL Outputs
• Maximum Clock Frequency: 2 GHz
• Maximum Core Current Consumption: 33 mA
• Very Low Additive Jitter: <100 fs, RMS in 10-kH
Datasheet
11
CDCLVP2106

Texas Instruments
High-Performance Clock Buffer

•1 Dual 1:6 Differential Buffer
• Two Clock Inputs
• Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL
• 12 LVPECL Outputs
• Maximum Clock Frequency: 2 GHz
• Maximum Core Current Consumption: 92 mA
• Very Low Additive Jitter: <100 fs, RMS in 10-
Datasheet
12
CDCLVD110

Texas Instruments
PROGRAMMABLE LOW-VOLTAGE 1:10 LVDS CLOCK DRIVER
1
• Low-Output Skew <30 ps (Typical) for Clock-Distribution Applications
• Distributes One Differential Clock Input to 10 LVDS Differential Clock Outputs
• VCC range 2.5 V ±5%
• Typical Signaling Rate Capability of Up to 1.1 GHz
• Configurable Regist
Datasheet
13
CDCLVC1112

Texas Instruments
3.3-V and 2.5-V LVCMOS High-Performance Clock Buffer

•1 High-Performance 1:2, 1:3, 1:4, 1:6, 1:8, 1:10, 1:12 LVCMOS Clock Buffer Family
• Very Low Pin-to-Pin Skew < 50 ps
• Very Low Additive Jitter < 100 fs
• Supply Voltage: 3.3 V or 2.5 V
• fmax = 250 MHz for 3.3 V fmax = 180 MHz for 2.5 V
• Operating
Datasheet
14
CLV0835E

ETC
VOLTAGE CONTROLLED OSCILLATOR

• Frequency Range: 800 - 835
• Tuning Voltage: 0.5-4.5 Vdc
• MINI-16-L - Style Package APPLICATIONS
• Digital Cellular
• VHF Communications
• Test Equipment PERFORMANCE SPECIFICATIONS Oscillation Frequency Range MHz VALUE 800 - 835 -113 -25 0.5-4.5
Datasheet
15
CLV0925E

ETC
VOLTAGE CONTROLLED OSCILLATOR
COs
• AN-102 : Proper Output Loading of VCOs
• AN-107 : How to Solder Z-COMM VCOs NOTES: © Z-Comm unicati ons, Inc. Page 1 All rights reserved LOW COST - HIGH PERFORMANCE VOLTAGE CONTROLLED OSCILLATOR T UNING CURVE, typ. CLV0925E PAGE 2 85 25
Datasheet
16
CLV1137

ETC
VOLTAGE CONTROLLED OSCILLATOR
100/1 : Mounting and Grounding of VCOs
• AN-102 : Proper Output Loading of VCOs
• AN-107 : How to Solder Z-COMM VCOs NOTES: © Z-Com municati ons, Inc. Page 1 All rights reserved LOW COST - HIGH PERFORMANCE VOLTAGE CONTROLLED OSCILLATOR T UNING C
Datasheet
17
CDCLVP2108

Texas Instruments
High-Performance Clock Buffer

•1 Dual 1:8 Differential Buffer
• Two Clock Inputs
• Universal Inputs Can Accept LVPECL, LVDS, LVCMOS/LVTTL
• 16 LVPECL Outputs
• Maximum Clock Frequency: 2 GHz
• Maximum Core Current Consumption: 115 mA
• Very Low Additive Jitter: <100 fs, RMS in 10
Datasheet
18
CDCLVP111-EP

Texas Instruments
Low-Voltage 1:10 LVPECL
1
• Distributes One Differential Clock Input Pair LVPECL to 10 Differential LVPECL
• Fully Compatible With LVECL and LVPECL
• Supports a Wide Supply Voltage Range From 2.375 V to 3.8 V
• Selectable Clock Input Through CLK_SEL
• Low-Output Skew (Typ 1
Datasheet
19
CDCLVD2102

Texas Instruments
Dual 1:2 Low Additive Jitter LVDS Buffer
1
• Dual 1:2 Differential Buffer
• Low Additive Jitter <300 fs RMS in 10-kHz to 20-MHz
• Low Within Bank Output Skew of 15 ps (Max)
• Universal Inputs Accept LVDS, LVPECL, LVCMOS
• One Input Dedicated for Two Outputs
• Total of 4 LVDS Outputs, ANSI E
Datasheet
20
CDCLVP215

Texas Instruments
LOW-VOLTAGE DUAL DIFFERENTIAL 1:5 LVPECL CLOCK DRIVER
1
•2 2× One Differential Clock Input Pair LVPECL to 5 Differential LVPECL Clock Outputs
• Fully Compatible With LVPECL/LVECL
• Supports a Wide Supply Voltage Range From 2.375 V to 3.8 V
• Open Input Default State
• Low-Output Skew (Typ 15 ps) for Clo
Datasheet



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