| No. | Partie # | Fabricant | Description | Fiche Technique |
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Cypress Semiconductor |
32-bit FM3 Microcontroller 32-bit Arm Cortex-M3 Core ◼Processor version: r2p1 ◼Up to 40 MHz Frequency Operation ◼Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels ◼24-bit System timer (Sy |
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Cypress |
16-bit Microcontroller Technology 0.18m CMOS CPU F2MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction queue Signed multiply |
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Cypress Semiconductor |
32-bit Microcontroller 32-bit Arm® Cortex®-M3 Core Processor version: r2p1 Up to 72 MHz Frequency Operation Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels 24-bit System timer ( |
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Cypress Semiconductor |
32-bit Microcontroller 32-bit ARM Cortex-M3 Core Processor version: r2p1 Up to 20 MHz Operation Frequency Integrated Nested Vectored Interrupt Controller (NVIC): 1 channel NMI (non-maskable interrupt) and 32 channels' peripheral interrupts and 8 priority levels 24-bit Syst |
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Cypress |
16-Bit Microcontroller Technology 0.18m CMOS CPU F2MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction queue Signed m |
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Cypress |
16-bit Proprietary Microcontroller Technology 0.18m CMOS CPU F2MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction queue Signed multiply |
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Cypress |
16-bit Proprietary Microcontroller Technology 0.18m CMOS CPU F2MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction queue Signed multiply |
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Cypress |
16-Bit Microcontroller Technology 0.18µm CMOS CPU F2MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction queue Signed mult |
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Cypress |
16-bit Proprietary Microcontroller |
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Cypress Semiconductor |
32-bit Microcontroller 32-bit ARM® Cortex®-M3 Core Processor version: r2p1 Up to 40 MHz Frequency Operation Integrated Nested Vectored Interrupt Controller (NVIC): 1 NMI (non-maskable interrupt) and 48 peripheral interrupts and 16 priority levels 24-bit System timer ( |
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Cypress |
16-Bit Microcontroller Technology 0.18m CMOS CPU F2MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction queue Signed m |
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Cypress |
16-bit Microcontroller Technology 0.18m CMOS CPU F2MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction queue Signed multiply |
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Cypress |
16-bit Proprietary Microcontroller Technology 0.18m CMOS CPU F2MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction queue Signed multiply |
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Cypress |
16-bit Proprietary Microcontroller Technology 0.18m CMOS CPU F2MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction queue Signed multiply |
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Cypress |
16-Bit Microcontroller Technology 0.18µm CMOS CPU F2MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction queue Signed mult |
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Cypress |
16-Bit Microcontroller |
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Cypress |
16-Bit Microcontroller |
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Cypress |
FR60 32-bit Microcontroller FR60 CPU Core ■ 32-bit RISC, load/store architecture, five-stage pipeline ■ 16-bit fixed-length instructions (basic instructions) ■ Instruction execution speed: 1 instruction per cycle ■ Instructions including memory-to-memory transfer, bit manipulat |
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Cypress |
16-Bit Microcontroller Technology 0.18m CMOS CPU F2MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction queue Signed m |
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Cypress |
16-Bit Microcontroller Technology 0.18m CMOS CPU F2MC-16FX CPU Optimized instruction set for controller applications (bit, byte, word and long-word data types, 23 different addressing modes, barrel shift, variety of pointers) 8-byte instruction queue Signed m |
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