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Analog Devices ADN DataSheet

No. Partie # Fabricant Description Fiche Technique
1
ADN8834

Analog Devices
1.5A Thermoelectric Cooler (TEC) Controller
Patented high efficiency single inductor architecture Integrated low RDSON MOSFETs for the TEC controller TEC voltage and current operation monitoring No external sense resistor required Independent TEC heating and cooling current limit settings Prog
Datasheet
2
ADN2855

Analog Devices
Multirate 155 Mbps/622 Mbps/1244 Mbps/1250 Mbps Burst Mode Clock And Data Recovery IC
Serial data input 155.52 Mbps/622.08 Mbps/1244.16 Mbps/1250.00 Mbps 12-bit acquisition time 4-bit parallel LVDS output interface Patented dual-loop clock recovery architecture Integrated PRBS generator Byte rate reference clock Loss-of-lock indicator
Datasheet
3
ADN2871

Analog Devices
Single-Loop Laser Diode Driver
SFP/SFF and SFF-8472 MSA-compliant SFP reference design available 50 Mbps to 4.25 Gbps operation Automatic average power control Typical rise/fall time 60ps Supports VCSEL, DFB, and FP lasers Bias current range 2 mA to 100 mA Modulation current range
Datasheet
4
ADN2526

Analog Devices
11.3 Gbps Active Back-Termination Differential Laser Diode Driver
3.3 V operation Up to 11.3 Gbps operation Typical 24 ps rise/fall times Full back-termination of output transmission lines Drives TOSAs with resistances ranging from 5 Ω to 50 Ω Bias current range: 10 mA to 100 mA Differential modulation current rang
Datasheet
5
ADN2812

Analog Devices
Continuous Rate 12.3 Mb/s to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp
Serial data input: 12.3 Mb/s to 2.7 Gb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 6 mV typical Adjustable slice level: ±100 mV Patented clock recovery architecture Loss of signal (LOS) detect range:
Datasheet
6
ADN4663

Analog Devices
LVDS High Speed Differential Driver
±15 kV ESD protection on output pins 600 Mbps (300 MHz) switching rates Flow-through pinout simplifies PCB layout 300 ps typical differential skew 700 ps maximum differential skew 1.5 ns maximum propagation delay 3.3 V power supply ±355 mV differenti
Datasheet
7
ADN2531

Analog Devices
Differential Laser Diode Driver
3.3 V operation Up to 11.3 Gbps operation Typical 26 ps rise/fall times Bias current range: 10 mA to 100 mA Differential modulation current range: 10 mA to 80 mA Voltage input control for bias and modulation currents Data inputs sensitivity: 150 mV p
Datasheet
8
ADN4694E

Analog Devices
(ADN4690E - ADN4695E) High Speed M-LVDS Transceivers
Multipoint LVDS transceivers (low voltage differential signaling driver and receiver pairs) Switching rate: 100 Mbps (50 MHz) Supported bus loads: 30 Ω to 55 Ω Choice of 2 receiver types Type 1 (ADN4690E/ADN4692E): hysteresis of 25 mV Type 2 (ADN4694
Datasheet
9
ADN2905

Analog Devices
CPRI and 10G Ethernet Data Recovery IC
GENERAL DESCRIPTION Serial CPRI data rates 614.4 Mbps, 1.2288 Gbps, 2.4576 Gbps, 3.072 Gbps, 4.9152 Gbps, 6.144 Gbps, and 9.8304 Gbps Ethernet data rates: 1.25 Gbps and 10.3125 Gbps No reference clock required Jitter performance superior to the SFF
Datasheet
10
ADN4693E-1

Analog Devices
High Speed M-LVDS Transceiver

► Full-duplex M-LVDS transceiver (driver and receiver pair)
► Switching rate: 200 Mbps (100 MHz)
► Type 1 receiver with input hysteresis of 25 mV
► Compatible with the TIA/EIA-899 standard for M-LVDS
► Glitch free power-up/power-down on M-LVDS bus
Datasheet
11
ADN3010-11

Analog Devices
11.3 Gbps Optical Receiver
Integrated SiGe PIN photodiode, transimpedance amplifier (TIA), and limiting amplifier (LA) Power monitor output: 1.0 A/W at O band wavelengths 50 µm diameter germanium photodiode Input sensitivity POMA = −16.5 dBm PAVE = −17.3 dBm (ER = 6 dB) PRBS31
Datasheet
12
ADN2841

Analog Devices
Dual-Loop 50 Mbps.2.7 Gbps Laser Diode Driver
50 Mbps to 2.7 Gbps operation Typical rise/fall time: 80 ps Bias current range: 2 mA to 100 mA Modulation current range: 5 mA to 80 mA Monitor photodiode current: 50 µA to 1200 µA Closed-loop control of power and extinction ratio Laser fail and laser
Datasheet
13
ADN8820

Analog Devices
EDFA and CW Laser Controller
Four Operational Modes Including: Constant Laser Current Constant Optical Output Power Constant EDFA Gain Constant Laser Power High Power Efficiency: >90% Three Built-In Photodiode TIAs Adjustable Laser Diode and EDFA Protection Limits Free-run or Sy
Datasheet
14
ADN8830

Analog Devices
Thermoelectric Cooler Controller
High Efficiency Small Size: 5 mm ؋ 5 mm LFCSP Low Noise: <0.5% TEC Current Ripple Long-Term Temperature Stability: ؎0.01؇C Temperature Lock Indication Temperature Monitoring Output Oscillator Synchronization with an External Signal Clock Phase Adjust
Datasheet
15
ADN2917

Analog Devices
Continuous Rate 8.5 Gbps to 11.3 Gbps Clock and Data Recovery IC
GENERAL DESCRIPTION Serial data input: 8.5 Gbps to 11.3 Gbps No reference clock required Exceeds SONET/SDH requirements for jitter transfer/generation/tolerance Quantizer sensitivity: 9.2 mV p-p typical (limiting amplifier mode) Optional limiting a
Datasheet
16
ADN2819

Analog Devices
Multirate to 2.7 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp
Meets SONET requirements for jitter transfer/generation/tolerance Quantizer sensitivity: 4 mV typical Adjustable slice level: ±100 mV 1.9 GHz minimum bandwidth Patented clock recovery architecture Loss of signal detect range: 3 mV to 15 mV Single ref
Datasheet
17
ADN2814

Analog Devices
Continuous Rate 10 Mb/s to 675 Mb/s Clock and Data Recovery
GENERAL DESCRIPTION Serial data input: 10 Mb/s to 675 Mb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 3.3 mV typical Adjustable slice level: ±95 mV Patented clock recovery architecture Loss-of-signal
Datasheet
18
ADN2816

Analog Devices
Continuous Rate 12.3 Mb/s to 675 Mb/s Clock and Data Recovery IC
Serial data input: 12.3 Mb/s to 675 Mb/s Exceeds SONET requirements for jitter transfer/ generation/tolerance Patented clock recovery architecture No reference clock required Loss of lock indicator I2C™ interface to access optional features Single-su
Datasheet
19
ADN2525

Analog Devices
10.7 Gbps Active Back-Termination
Up to 10.7 Gbps operation Very low power: 670 mW (IBIAS = 40 mA, IMOD = 40 mA) Typical 24 ps rise/fall times Full back-termination of output transmission lines Drives TOSAs with resistances ranging from 5 Ω to 50 Ω PECL-/CML-compatible data inputs Bi
Datasheet
20
ADN2804

Analog Devices
Clock and Data Recovery
Exceeds SONET requirements for jitter transfer/ generation/tolerance Quantizer sensitivity: 3.3 mV typical Adjustable slice level: ±95 mV Patented clock recovery architecture Loss-of-signal (LOS) detect range: 2.6 mV to 18.4 mV Independent slice leve
Datasheet



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