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ARM ARM DataSheet

No. Partie # Fabricant Description Fiche Technique
1
STM32F407

STMicroelectronics
Arm 32-bit Cortex-M4 CPU

• Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/ 1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instr
Datasheet
2
STM32F103C8T6

STMicroelectronics
ARM-based 32-bit MCU

• ARM® 32-bit Cortex®-M3 CPU Core
  – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access
  – Single-cycle multiplication and hardware division
• Memories
  – 64 or 128 Kbytes of Flash memory
  – 20 Kbytes of SR
Datasheet
3
STM32F429

STMicroelectronics
ARM Cortex-M4 32-bit MCU+FPU

• Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory, frequency up to 180 MHz, MPU, 225 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
• Memorie
Datasheet
4
STM32L432KC

STMicroelectronics
Ultra-low-power Arm Cortex-M4 32-bit MCU+FPU

• Ultra-low-power with FlexPowerControl
  – 1.71 V to 3.6 V power supply
  – -40 °C to 85/105/125 °C temperature range
  – 8 nA Shutdown mode (2 wakeup pins)
  – 28 nA Standby mode (2 wakeup pins)
  – 280 nA Standby mode with RTC
  – 1.0 µA Stop 2 mode, 1.28 µA
Datasheet
5
STM32F105VC

STMicroelectronics
ARM-based 32-bit MCU
FBGA
• Core: ARM 32-bit Cortex -M3 CPU
  – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access
  – Single-cycle multiplication and hardware division
• Memories
  – 64 to 256 Kbytes of Flash memory
  – 64 Kbytes
Datasheet
6
STM32F105VB

STMicroelectronics
ARM-based 32-bit MCU
FBGA
• Core: ARM 32-bit Cortex -M3 CPU
  – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access
  – Single-cycle multiplication and hardware division
• Memories
  – 64 to 256 Kbytes of Flash memory
  – 64 Kbytes
Datasheet
7
STM32F405RG

STMicroelectronics
Arm 32-bit Cortex-M4 CPU

• Core: Arm® 32-bit Cortex®-M4 CPU with FPU, Adaptive real-time accelerator (ART Accelerator) allowing 0-wait state execution from Flash memory, frequency up to 168 MHz, memory protection unit, 210 DMIPS/ 1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instr
Datasheet
8
LPC1769

NXP Semiconductors
32-bit ARM Cortex-M3 microcontroller
Datasheet
9
STM32F105RC

STMicroelectronics
ARM-based 32-bit MCU
FBGA
• Core: ARM 32-bit Cortex -M3 CPU
  – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access
  – Single-cycle multiplication and hardware division
• Memories
  – 64 to 256 Kbytes of Flash memory
  – 64 Kbytes
Datasheet
10
LPC11U23

NXP
32-bit ARM Cortex-M0 microcontroller
and benefits
 System:  ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.  ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).  Non-Maskable Interrupt (NMI) input selectable from several input sources.  System tick
Datasheet
11
TWFK-30017-000

Knowles Electronics
Balanced Armature Driver

• Best-in-class treble
• HD Audio to 40kHz
• Also midrange-tweeter in hybrids
• Small size
• RoHS compliant Outline Drawing mm (inches) Demonstrator Earphone Model Number (standard sample in BOLD) without MIC with MIC Straight Cable TC-3
Datasheet
12
LM8560

Unisonic Technologies
DIGITAL ALARM CLOCK
*Single chip P-channel ED MOS LSI *LED direct drive using time division (duplex configuration) *Wide operating power supply voltage range *Built-in alarm function with 24-hour control *Supports changeover between 12-hour AM/PM and 24-hour displays *B
Datasheet
13
LPC1788

NXP
(LPC177x / LPC178x) 32-bit ARM Cortex-M3 microcontroller
and a higher level of support block integration. The Cortex-M3 CPU incorporates a 3-stage pipeline and has a Harvard architecture with separate local instruction and data buses, as well as a third bus with slightly lower performance for peripherals.
Datasheet
14
GD32F103

GigaDevice
ARM Cortex-M3 32-bit MCU
..................... 9 2.3. Pinouts and pin assignment ........................................................................................ 11 2.4. Memory map.......................................................................................
Datasheet
15
STM32F105V8

STMicroelectronics
ARM-based 32-bit MCU
FBGA
• Core: ARM 32-bit Cortex -M3 CPU
  – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access
  – Single-cycle multiplication and hardware division
• Memories
  – 64 to 256 Kbytes of Flash memory
  – 64 Kbytes
Datasheet
16
SAM9G45

ATMEL
AT91SAM ARM-based Embedded MPU
the frequently demanded combination of user interface functionality and high data rate connectivity, including LCD controller, resistive touchscreen, camera interface, audio, Ethernet 10/100 and high speed USB and SDIO. With the processor running at
Datasheet
17
ARM7TDMI

ETC
general purpose 32-bit microprocessors
his datasheet, or any error or omission in such information, or any incorrect use of the product. Change Log Issue A (Draft 0.1) (Draft 0.2) B C D draft1 D E Date Sept 1994 Oct 1994 Dec 1994 Dec 1994 Mar 1995 Mar 1995 Mar 1995 Aug 1995 By EH/BJH EH
Datasheet
18
STM32F103C8

STMicroelectronics
ARM-based 32-bit MCU
Includes ST state-of-the-art patented technology
• Arm® 32-bit Cortex®-M3 CPU core
  – 72 MHz maximum frequency, 1.25 DMIPS/MHz (Dhrystone 2.1) performance at 0 wait state memory access
  – Single-cycle multiplication and hardware division
• Memories
  – 6
Datasheet
19
STM32H743AI

STMicroelectronics
32-bit Arm Cortex-M7 480MHz MCUs
Includes ST state-of-the-art patented technology Core
• 32-bit Arm® Cortex®-M7 core with doubleprecision FPU and L1 cache: 16 Kbytes of data and 16 Kbytes of instruction cache; frequency up to 480 MHz, MPU, 1027 DMIPS/ 2.14 DMIPS/MHz (Dhrystone 2.1),
Datasheet
20
HMS30C7202

Hynix Semiconductor
32-bit ARM7TDMI RISC static CMOS CPU core
„ „ „ „ „ „ 32-bit ARM7TDMI RISC static CMOS CPU core : Running up to 70 MHz 8Kbytes combined instruction/data cache Memory management unit Supports Little Endian operating system 2Kbytes SRAM for internal buffer memory On-chip peripherals with indiv
Datasheet



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