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ZL30254 - Microsemi

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ZL30254 Clock Multiplier and Jitter Attenuator

All device inputs and outputs are LVCMOS unless described otherwise. The Type column uses the following symbols: I – input, IPU – input with 50k internal pullup resistor, O – output, A – analog, P – power supply pin.. Table 1 - Pin Descriptions Pin # Name Type Description Input Clock Pins 8 IC1 I Single-ended signal format. For input signal amplit.

Features

Input Clocks
 Two CMOS inputs, both 8kHz or 25MHz
 Inputs continually monitored for frequency accuracy (±1%)
 Automatic revertive reference switching Low-Bandwidth DPLL
 25Hz bandwidth for jitter attenuation
 ±120ppm tracking range
 Digital hold on loss of all inputs Clock Multiplier APLL and Output Clocks
 Easy-to-configure, encapsulated design requires no external VCXO or loop filter components
 Two CML outputs, both 125MHz or 156.25MHz
 Outputs easily interface with CML, LVDS or LVPECL components
 Output jitter <1ps RMS (12kHz-20MHz) ZL30254 2-In, 2-Out 8kHz/25MHz to 125/156.25MH.

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