XP2-30 - Lattice Semiconductor

XP2-30 FPGA fabric

LatticeXP2™ Family Data Sheet DS1009 Version 2.2, September 2014 LatticeXP2 Family Data Sheet Introduction February 2012 Features  flexiFLASH™ Architecture • Instant-on • Infinitely reconfigurable • Single chip • FlashBAK™ technology • Serial TAG memory • Design security  Live Update Technology • TransFR™ technology • Secure updates with 128 bit AES encr.

Features

 flexiFLASH™ Architecture
• Instant-on
• Infinitely reconfigurable
• Single chip
• FlashBAK™ technology
• Serial TAG memory
• Design security
 Live Update Technology
• TransFR™ technology
• Secure updates with 128 bit AES encryption
• Dual-boot with external SPI
 sysDSP™ Block
• Three to eight blocks for high performance  Multiply and Accumulate
• 12 to 32 18x18 multipliers
• Each block supports one 36x36 multiplier or four 18x18 or eight 9x9 multipliers
 Embedded and Distributed Memory
• Up to 885 Kbits sysMEM™ EBR
• Up to 83 Kbits Distributed RAM
 sysCLOCK™ PLLs
• Up to four analog PLL.