V55C2128164V - Mosel Vitelic Corp

V55C2128164V 128Mbit LOW-POWER SDRAM 2.5 VOLT/ TSOP II / BGA PACKAGE 8M X 16

BGA Pkg. B Pin Count 54 C=CMOS Family 2.5V Supply Voltage 128Mb(4K Refresh) 4 Banks S=SSTL 60 Pin WBGA PIN CONFIGURATION Top View Pin Configuration for x16 devices: 1 2 3 A B C D E F G H J 7 8 9 VDD DQ1 DQ3 DQ5 VSS DQ15 VSSQ DQ14 DQ13 VDDQ DQ12 DQ11 VSSQ DQ10 DQ9 VDDQ DQ8 NC VSS CKE A9 A6 A4 VDDQ DQ0 VSSQ DQ2 VDDQ DQ4 VSSQ DQ6 VDD LDQM DQ7 CAS.

Features

■ 4 banks x 2Mbit x 16 organization
■ High speed data transfer rates up to 166 MHz
■ Full Synchronous Dynamic RAM, with all signals referenced to clock rising edge
■ Single Pulsed RAS Interface
■ Data Mask for Read/Write Control
■ Four Banks controlled by BA0 & BA1
■ Programmable CAS Latency:1, 2, 3
■ Programmable Wrap Sequence: Sequential or Interleave
■ Programmable Burst Length: 1, 2, 4, 8, Full page for Sequential Type 1, 2, 4, 8 for Interleave Type
■ Multiple Burst Read with Single Write Operation
■ Automatic and Controlled Precharge Command
■ Random Column Address every CLK (1-N Rule)
■ .