UT700 - Aeroflex Circuit Technology

UT700 32-bit Fault-Tolerant SPARC V8/LEON 3FT Processor

Pin Function Description I CMOS input IS CMOS input Schmitt O CMOS output I/O CMOS bi-direct OD CMOS open drain PCI-I PCI input PCI-O PCI output PCI-I/O PCI bi-direct PCI-3 PCI three-state 2.1. System Signals Pin Name SYSCLK NODIV Function I I Pin Number 484 CLGA Y20 E19 Reset Value --- RESET ERROR1 IS L19 OD K19 --- WDOG1 OD J19 --.

Features

 Supports up to 166 MHz clock rate  Separate instruction and data cache architecture  High-performance fully pipelined IEEE-754 FPU  Enhanced pipeline with 1.2 DMIPS / MHz performance  Implemented on 130nm CMOS technology  Internally configured clock network  Power saving 1.2V core power supply  3.3V I/O compatibility  Hardened-by-design flip-flops and memory cells  Reed Solomon EDAC  Multifunctional memory controller  10/100 Base-T Ethernet port for VxWorks development  Integrated PCI 2.2 compatible core  Four integrated multi-protocol SpaceWire nodes that support the RMAP proto.