UPC4092 - NEC

UPC4092 J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER

DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC4092 J-FET INPUT LOW-OFFSET DUAL OPERATIONAL AMPLIFIER The µPC4092 dual operational amplifier offers high input impedance, low offset voltage, high slew rate, and stable AC operating characteristics. NEC's unique high-speed PNP transistor (f T = 300 MHz) in the output stage solves the oscillation problem of.

Features

• Stable operation with 10000 pF capacitive load
• Low input offset voltage ±3 mV (MAX.) ±7 µV/°C (TYP.) temperature drift
• Very low input bias and offset currents
• Low noise : en = 19 nV/ √Hz (TYP.)
• Output short circuit protection
• High input impedance ... J-FET Input Stage
• Internal frequency compensation
• High slew rate: 15 V/µs (TYP.) ORDERING INFORMATION Part Number Package 8-pin plastic DIP (300 mil) 8-pin plastic SOP (225 mil) µPC4092C µPC4092G2 EQUIVALENT CIRCUIT (1/2 Circuit) + PIN CONFIGURATION (Top View) V µ PC4092C, 4092G2 Q9 Q6 II Q1 Q2 C1 Q5 Q3 Q4 Q8 TRIMMED − OUT1 .