UM10360 - NXP Semiconductors

UM10360 LPC17xx User manual

LPC17xx user manual revision. Modifications: • • • • • • “Draft” status removed. Editorial updates and typographical corrections throughout the user manual. LPC1758, LPC1767, and LPC1768 have been added to the keywords list on the front cover, the ordering information in section Section 1–4, and the part identification number table in Section 32–7.11. The .

Features

and a higher level of support block integration. High speed versions (LPC1769 and LPC1759) operate at up to a 120 MHz CPU frequency. Other versions operate at up to an 100 MHz CPU frequency. The ARM Cortex-M3 CPU incorporates a 3-stage pipeline and uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals. The ARM Cortex-M3 CPU also includes an internal prefetch unit that supports speculative branches. The peripheral complement of the LPC17xx includes up to 512 kB of flash memory, up to 64 kB of data memory, Ethernet MAC, a USB interface .