UDA1352TS - NXP Semiconductors

UDA1352TS 48 kHz IEC 60958 audio DAC

ORDERING INFORMATION QUICK REFERENCE DATA BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Clock regeneration and lock detection Mute Auto mute Data path Control L3-BUS DESCRIPTION General Device addressing Register addressing Data write mode Data read mode Initialization string I2C-BUS DESCRIPTION Characteristics of the I2C-bus Bit transfer Byte transfer Data t.

Features

General Control IEC 60958 input Digital sound processing and DAC APPLICATIONS GENERAL DESCRIPTION ORDERING INFORMATION QUICK REFERENCE DATA BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Clock regeneration and lock detection Mute Auto mute Data path Control L3-BUS DESCRIPTION General Device addressing Register addressing Data write mode Data read mode Initialization string I2C-BUS DESCRIPTION Characteristics of the I2C-bus Bit transfer Byte transfer Data transfer Start and stop conditions Acknowledgment Device address Register address Write and read data Write cycle Read cycle Preliminary speci.