TN80C31BH - Intel Corporation

TN80C31BH CHMOS SINGLE-CHIP 8-BIT MICROCONTROLLER

VCC Supply voltage during normal Idle and Power Down operations VSS Circuit ground VSS1 VSS1 (EPROM PLCC only) secondary ground Provided to reduce ground bounce and improve power supply bypassing NOTE This pin is not a substitute for the VSS pin (pin 22) For ROM and ROMless pin 1 is reserved do not connect Port 0 Port 0 is an 8-bit open drain bidirectional I.

Features

4 Kbytes of EPROM ROM (87C51 80C51BH respectively) 128 bytes of RAM 32 I O lines two 16-bit timer counters a five-source two-level interrupt structure a full duplex serial port and on-chip oscillator and clock circuitry In addition the MCS 51 CHMOS microcontroller products exhibit low operating power along with two software selectable modes of reduced activity for further power reduction Idle and Power Down The Idle mode freezes the CPU while allowing the RAM timer counters serial port and interrupt system to continue functioning The Power Down mode saves the RAM contents but freezes the oscil.