TMS626812 - Texas Instruments

TMS626812 SYNCHRONOUS DYNAMIC RANDOM-ACCESS MEMORY

The TMS626812 is a high-speed 16 777 216-bit synchronous dynamic random access memory (SDRAM) device organized as two banks of 1 048 576 words with eight bits per word. All inputs and outputs of the TMS626812 series are compatible with the LVTTL interface. PIN NOMENCLATURE A0 – A10 Address Inputs A0 – A10 Row Addresses A0 – A8 Column Addresses A10 Auto.

Features

10 11 12 13 14 15 16 17 18 19 20 21 22 44 VSS 43 DQ7 42 VSSQ 41 DQ6 40 VCCQ 39 DQ5 38 VSSQ 37 DQ4 36 VCCQ 35 NC 34 NC 33 DQM 32 CLK 31 CKE 30 NC 29 A9 28 A8 27 A7 26 A6 25 A5 24 A4 23 VSS SYNCHRONOUS CLOCK CYCLE TIME tCK3 tCK2 (CL = 3) (CL = 2) ACCESS TIME CLOCK TO OUTPUT tCK3 tCK2 (CL = 3) (CL = 2) ’626812-12A† 12 ns 15 ns 9 ns 9 ns ’626812-12 12 ns 18 ns 9 ns 10 ns †
  –12A speed device is supported only at
  –5/+10% VCC REFRESH INTERVAL 64 ms 64 ms description The TMS626812 is a high-speed 16 777 216-bit synchronous dynamic random access memory (SDRAM) device organized.