TMS320C6411 - Texas Instruments

TMS320C6411 Fixed-Point Digital Signal Processor

. . . . . 5 device characteristics . . . . . 6 device compatibility . . . . . . . 7 functional block and CPU (DSP core) diagram . . 8 CPU (DSP core) description ..

Features

− Byte-Addressable (8-/16-/32-/64-Bit Data) − 8-Bit Overflow Protection − Bit-Field Extract, Set, Clear − Normalization, Saturation, Bit-Counting − VelociTI.2 Increased Orthogonality D L1/L2 Memory Architecture − 128K-Bit (16K-Byte) L1P Program Cache (Direct Mapped) − 128K-Bit (16K-Byte) L1D Data Cache (2-Way Set-Associative) − 2M-Bit (256K-Byte) L2 Unified Mapped RAM/Cache (Flexible RAM/Cache Allocation) D 32-Bit External Memory Interface (EMIF) − Glueless Interface to Asynchronous Memories (SRAM and EPROM) and Synchronous Memories (SDRAM, SBSRAM, ZBT SRAM, and FIFO) − 512M-Byte Total Addres.