TC90106FG - Toshiba

TC90106FG Multi System Video Decoder

Pin No. Pin Name Pin Function 1 AVDDAD3W 2.5 V power supply for ADC 2 AVSSAD3 GND for ADC 3 DAOUT Output of DAC circuit 4 AVDDPLL 2.5 V power supply for DAC/PLL 5 VCOFIL VCO Filter terminal 6 PLLIN Input of PLL circuit 7 AVSSPLL DAC/PLL GND 8 AVSSXO GND for X'tal circuit 9 XTIN Input for X'tal circuit 10 XTOUT Output for X'tal.

Features

is nothing.
• 8bit ITU-R BT.656 / 8bit 4:2:2 Serial + SAV/EAV implantation or Sync output
• I2C-bus control
• Operating temperature: -40°C to + 85°C
• Package: LQFP64-P-1010-0.50E (0.50 mm pitch)
• Power supply: 3.3 V, 2.5 V, 1.5 V ©2016 TOSHIBA CORPORATION Page 1 Rev.200 2016/06/21 2. Block Diagram CVBS1 CVBS2 CVBS3 YCbCr1 Y1 YCbCr2 Y2 S1 C1/Cr1 S2 C2/Cr2 Cb1 Cb2 3. Pin Layout Summary TC90106FG X’tal 42 MHz Sync Sepa SW HPLL Reference clock 10bit ADC 2DYCS SW SW 8bit ADC C.DEC SW 8bit ADC Picture process Contrast CTI LTI Vertical enhance HUE delay adjust IIC-BUS SDA SCL For.