applies to each byte. The twenty flip-flops will store the state of their individual D inputs that meet the setup and Weight: 0.25 g (typ.) hold time requirements on the LOW-to-HIGH Clock (CK) transition. When the OE input is high, the outputs are in a high-impedance state. This device is designed to be used with 3-state memory address drivers, etc. The.
• 26-Ω series resistors on outputs.
• Low-voltage operation: VCC = 1.8 to 3.6 V
• High-speed operation: tpd = 4.4 ns (max) (VCC = 3.0 to 3.6 V)
: tpd = 5.8 ns (max) (VCC = 2.3 to 2.7 V) : tpd = 9.8 ns (max) (VCC = 1.8 V)
• Output current: IOH/IOL = ±12 mA (min) (VCC = 3.0 V) : IOH/IOL = ±8 mA (min) (VCC = 2.3 V) : IOH/IOL = ±4 mA (min) (VCC = 1.8 V)
• Latch-up performance: −300 mA
• ESD performance: Machine model ≥ ±200 V Human body model ≥ ±2000 V
• Package: TSSOP
• 3.6-V tolerant function and power-down protection provided on all inputs and outputs
Start of commercial production
1997-11
1
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No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | TC74VCX162823FT |
Toshiba |
Low-Voltage 18-Bit D-Type Flip-Flop | |
2 | TC74VCX162827FT |
Toshiba |
Low-Voltage 20-Bit Bus Buffer | |
3 | TC74VCX162834FT |
Toshiba |
Low-Voltage 18-Bit Universal Bus Driver | |
4 | TC74VCX162835FT |
Toshiba |
Low-Voltage 18-Bit Universal Bus Driver | |
5 | TC74VCX162841FT |
Toshiba |
LOW VOLTAGE 20-BIT D-TYPE LATCH WITH 3.6V TOLERANT INPUTS AND OUTPUTS | |
6 | TC74VCX162843FT |
Toshiba |
Low-Voltage 18-Bit D-Type Latch | |
7 | TC74VCX162244FT |
Toshiba |
Low-Voltage 16-Bit Bus Buffer | |
8 | TC74VCX162373FT |
Toshiba |
Low-Voltage 16-Bit D-Type Latch | |
9 | TC74VCX162374FT |
Toshiba |
Low-Voltage 16-Bit D-Type Flip-Flop | |
10 | TC74VCX16244FT |
Toshiba |
Low-Voltage 16-Bit Bus Buffer | |
11 | TC74VCX16245 |
Toshiba |
Low-Voltage 16-Bit Bus Transceiver | |
12 | TC74VCX16245FT |
Toshiba |
Low-Voltage 16-Bit Bus Transceiver |