s Max. propagation delay of 700ps s IEE min. of –55mA s Extended supply voltage option: VEE = –4.2V to –5.5V s Voltage and temperature compensation for improved noise immunity s 70% faster than Fairchild 300K at lower power s Internal 75kΩ input pull-down resistors s Function and pinout compatible with Fairchild F100K s Available in 28-pin PLCC package The.
DESCRIPTION
s Max. propagation delay of 700ps s IEE min. of
–55mA s Extended supply voltage option:
VEE =
–4.2V to
–5.5V s Voltage and temperature compensation for
improved noise immunity s 70% faster than Fairchild 300K at lower power s Internal 75kΩ input pull-down resistors s Function and pinout compatible with Fairchild F100K s Available in 28-pin PLCC package
The SY100S321 is a monolithic 9-bit inverter. The device contains nine inverting buffer gates with single input and output.
BLOCK DIAGRAM
D1 D2 D3 D4 D5 D6 D7 D8 D9
O1 O2 O3 O4 O5 O6 O7 O8 O9
PIN NAMES
Pin D1
– D9 Q1
– Q9 VEES .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | SY100S322 |
Micrel Semiconductor |
9-BIT Buffer | |
2 | SY100S324 |
Micrel Semiconductor |
LOW POWER HEX TTL-to-ECL TRANSLATOR | |
3 | SY100S325 |
Micrel Semiconductor |
LOW-POWER HEX ECL-to-TTL TRANSLATOR | |
4 | SY100S301 |
Micrel Semiconductor |
Triple 5-INPUT OR/NOR GATE | |
5 | SY100S302 |
Micrel Semiconductor |
Quint 2-INPUT OR/NOR GATE | |
6 | SY100S304 |
Micrel Semiconductor |
QUINT AND/NAND GATE | |
7 | SY100S307 |
Micrel Semiconductor |
QUINT EXCLUSIVE OR/NOR GATE | |
8 | SY100S313 |
Micrel Semiconductor |
Quad Driver | |
9 | SY100S314 |
Micrel Semiconductor |
Quint Differential Line Receiver | |
10 | SY100S317 |
Micrel Semiconductor |
TRIPLE 2-WIDE OA/OAI GATE | |
11 | SY100S318 |
Micrel Semiconductor |
OA/OAI GATE | |
12 | SY100S331 |
Micrel Semiconductor |
TRIPLE D FLIP-FLOP |