STA1095 - STMicroelectronics

STA1095 Dual core processor

. . . 10 2 System description . . . . . 11 2.1 Processor MCU11 2.2 Memory controller ..

Features

 AEC-Q100 qualified Core and infrastructure
 ARM Cortex-R4 MCU running at up to 600 MHz
 MCU memory organization
  – L1 Cache: 32K instruction, 32K data
  – 32 KB ITCM + 32 KB DTCM
  – 1.25 MB embedded SRAM
  – STA109x SDRAM controller: 16/32-bit data up to 166 MHz
  – STA108x SDRAM controller: 16-bit data up to 166 MHz
  – Serial QIO NOR interface executable in place
  – 16-bit parallel NAND/NOR controller
 32-bit watchdog timer
 16-channel DMA
 8x 32-bit free running times/counters
 5x 16-bit extended function timer (EFT) with input capture/output compare and PWM
 Real time clock (RTC) with fracti.