SR5015-81 - SMSC

SR5015-81 Quad Static Shift Register

The SMC SR 5015-XXX is a quad static shift register family fabricated using SMC's COPLAMOS@ N channel silicon gate process which provides a higher functional density and speed on a monolithic chip than conventional MaS technology. The COPLAMOS® process provides high speed operation, low power dissipation, low clock input capacitance, and single +5 volt power.

Features

D COPLAMOS® N Channel Silicon Gate Technology D Variable Length-Single Mask Programmable-1 to 134 bits D Directly TTL-compatible on all inputs, outputs, and clock D Clear function D Operation guaranteed from DC to 1.0 MHz D Recirculate logic on-chip D Single +5.0V power supply D Low clock input capacitance D 16 pin ceramic DIP Package D Pin for Pin replacement for AMI 82182. 83. 85 PIN CONFIGURATION INPUT A RECASC CLEAR INPUTS OUTPUTS GND Vee OUTPUTC OUTPUT A RID OUTPUTD INPUTD RECD NC INPUTC CLOCK APPLICATIONS D Memory Buffering D Unique Buffering Lengths D Terminals BLOCK DIAGRAM OUTPU.