SN74LS373, SN74LS374 Octal Transparent Latch with 3−State Outputs; Octal D−Type Flip−Flop with 3−State Output The SN74LS373 consists of eight latches with 3-state outputs for bus organized system applications. The flip-flops appear transparent to the data (data changes asynchronously) when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the s.
D-Type Inputs
• Buffered Positive Edge-Triggered Clock
• Hysteresis on Clock Input to Improve Noise Margin
• Input Clamp Diodes Limit High Speed Termination Effects
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min Typ Max Unit
VCC
Supply Voltage
TA
Operating Ambient
Temperature Range
4.75 5.0 5.25
V
0
25
70
°C
IOH
Output Current − High
IOL
Output Current − Low
−2.6 mA
24
mA
20 1
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LOW POWER SCHOTTKY
MARKING DIAGRAMS
SN74LS37xN AWLYYWW
1 PDIP−20 N SUFFIX CASE 738
20 1
LS37x AWLYYWW
1 SOIC−20 DW SUFFIX CASE 751D
74LS37x
AWLYWW
20
1
SOEIAJ−20 1
M SU.
OCTAL TRANSPARENT LATCH WITH 3-STATE OUTPUTS; OCTAL D-TYPE FLIP-FLOP WITH 3-STATE OUTPUT The SN54 / 74LS373 consists of.
These 8-bit registers feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impe.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | SN74LS37 |
Motorola |
QUAD 2-INPUT NAND BUFFER | |
2 | SN74LS37 |
Texas Instruments |
Quadruple 2-Input Positive-NAND Buffers | |
3 | SN74LS373 |
ON Semiconductor |
Octal Transparent Latch | |
4 | SN74LS373 |
Motorola |
OCTAL TRANSPARENT LATCH | |
5 | SN74LS373 |
Texas Instruments |
OCTAL D-TYPE TRANSPARENT LATCHES AND EDGE-TRIGGERED FLIP-FLOPS | |
6 | SN74LS375 |
Motorola |
4-BIT D LATCH | |
7 | SN74LS375 |
Texas Instruments |
4-Bit Bistable Latches | |
8 | SN74LS377 |
ON Semiconductor |
Octal D Flip-Flop | |
9 | SN74LS377 |
Motorola |
OCTAL D FLIP-FLOP | |
10 | SN74LS377 |
Texas Instruments |
D-TYPE FLIP-FLOPS | |
11 | SN74LS378 |
Motorola |
OCTAL D FLIP-FLOP | |
12 | SN74LS378 |
Texas Instruments |
D-TYPE FLIP-FLOPS |