SN74LS195A - ON Semiconductor

SN74LS195A Universal 4-Bit Shift Register

The Logic Diagram and Truth Table indicate the functional characteristics of the LS195A 4-Bit Shift Register. The device is useful in a wide variety of shifting, counting and storage applications. It performs serial, parallel, serial to parallel, or parallel to serial data transfers at very high speeds. The LS195A has two primary modes of operation, shift ri.

Features

38 Units/Rail SN74LS195ADR2 SOIC−16 2500/Tape & Reel © Semiconductor Components Industries, LLC, 2006 1 July, 2006 − Rev. 8 Publication Order Number: SN74LS195A/D SN74LS195A CONNECTION DIAGRAM DIP (TOP VIEW) VCC Q0 Q1 Q2 Q3 Q3 CP PE 16 15 14 13 12 11 10 9 NOTE: The Flatpak version has the same pinouts (Connection Diagram) as the Dual In-Line Package. 1 2 3 4 56 78 MR J K P0 P1 P2 P3 GND PIN NAMES PE P0 − P3 J K CP MR Q0 − Q3 Q3 Parallel Enable (Active LOW) Input Parallel Data Inputs First Stage J (Active HIGH) Input First Stage K (Active LOW) Input Clock (Active HIGH Going Edge) Inp.