SN65LVDS95-Q1 - Texas Instruments

SN65LVDS95-Q1 LVDS SERDES TRANSMITTER

ordering information The SN65LVDS95 LVDS serdes (serializer/deserializer) transmitter contains three 7-bit parallel-load serial-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 bits of single-ended LVTTL data to be synchronously transmitted o.

Features

11 12 D12 13 VCC 14 D13 15 D14 16 GND 17 D15 18 D16 19 D17 20 VCC 21 D18 22 D19 23 GND 24 48 D3 47 D2 46 GND 45 D1 44 D0 43 NC 42 LVDSGND 41 Y0M 40 Y0P 39 Y1M 38 Y1P 37 LVDSVCC 36 LVDSGND 35 Y2M 34 Y2P 33 CLKOUTM 32 CLKOUTP 31 LVDSGND 30 PLLGND 29 PLLVCC 28 PLLGND 27 SHTDN 26 CLKIN 25 D20 description/ordering information The SN65LVDS95 LVDS serdes (serializer/deserializer) transmitter contains three 7-bit parallel-load serial-out shift registers, a 7× clock synthesizer, and four low-voltage differential signaling (LVDS) line drivers in a single integrated circuit. These functions allow 21 b.