SN65LVDS314 - Texas Instruments

SN65LVDS314 PROGRAMMABLE 27-BIT SERIAL-TO-PARALLEL RECEIVER

The SN65LVDS314 receiver de-serializes FlatLink™3G compliant serial input data to 27 parallel data outputs. The SN65LVDS314 receiver contains one shift register to load 30 bits from 1, 2 or 3 serial inputs and latches the 24 pixel bits and 3 control bits out to the parallel CMOS outputs after checking the parity bit. If the parity check confirms correct pari.

Features

1
•2 Serial Interface Technology
• Compatible with FlatLink™3G such as SN65LVDS301 and SN65LVDS311
• Supports Video Interfaces up to 24-bit RGB Data and 3 Control Bits Received over 1, 2 or 3 SubLVDS Differential Lines
• SubLVDS Differential Voltage Levels
• Flexible RGB Signaling Level of 1.8 V to 3.3 V
• Up to 1.755 Gbps Data Throughput
• Three Operating Modes to Conserve Power
  – Active mode QVGA - 17 mW
  – Typical Shutdown - 0.6 μW
  – Typical Standby Mode - 54 μW Typical
• Bus-Swap Function for PCB-Layout Flexibility
• ESD Rating > 4 kV (HBM)
• Pixel Clock Range of 4 MHz
  –65 MHz
• Failsafe on .