SN54ABT2952A - Texas Instruments

SN54ABT2952A OCTAL BUS TRANSCEIVERS/REGISTERS

The ’ABT2952A transceivers consist of two 8-bit back-to-back registers that store data flowing in both directions between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input provided that the clock-enable (CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB .

Features

KBA 13 CLKENBA SN54ABT2952A . . . FK PACKAGE (TOP VIEW) A7 A8 VCC NC B8 B7 B6 description The ’ABT2952A transceivers consist of two 8-bit back-to-back registers that store data flowing in both directions between two bidirectional buses. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input provided that the clock-enable (CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data on either port. To ensure the high-impedance state during power up or power down, OE should be tied to V.