SM320C6711-EP - Texas Instruments

SM320C6711-EP Digital Signal Processor

. . . . . 4 device characteristics . . . . . 5 device compatibility . . . . . . . 6 functional block and CPU (DSP core) diagram . . 7 CPU (DSP core) description ..

Features

− Hardware Support for IEEE Single-Precision and Double-Precision Instructions − Byte-Addressable (8-, 16-, 32-Bit Data) − 8-Bit Overflow Protection − Saturation − Bit-Field Extract, Set, Clear − Bit-Counting − Normalization D Device Configuration − Boot Mode: HPI, 8-, 16-, 32-Bit ROM Boot − Endianness: Little Endian, Big Endian SGUS054A − AUGUST 2004 − REVISED SEPTEMBER 2005 D L1/L2 Memory Architecture − 32K-Bit (4K-Byte) L1P Program Cache (Direct Mapped) − 32K-Bit (4K-Byte) L1D Data Cache (2-Way Set-Associative) − 512K-Bit (64K-Byte) L2 Unified Mapped RAM/Cache (Flexible Data/Program Alloca.