. . . . . . .9 3.1. VDD and VDDO Supplies .9 3.2. Loss Of Signal Indicator (LOS) . . . . . .9 3.3. Output En.
18 17 16 15 14 13 7 8 9 10 11 12
Supports single-ended or differential input clock signals Generates four differential (LVPECL, LVDS, HCSL) or eight single-ended (CMOS, SSTL, HSTL) outputs Provides signal level translation
Differential to single-ended
Single-ended to differential
Differential to differential
Single-ended to single-ended Wide frequency range
LVPECL, LVDS: 5 to 710 MHz
HCSL: 5 to 250 MHz
SSTL, HSTL: 5 to 350 MHz
CMOS: 5 to 200 MHz Additive jitter: 150 fs RMS typ
RSVD_GND
CLK0A
CLK0B
VDD
VDDO0
20
Small size: 24-lead, 4 x 4.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | SI533 |
Silicon Laboratories |
DUAL FREQUENCY CRYSTAL OSCILLATOR | |
2 | Si53301 |
Skyworks |
Ultra-Low Additive Jitter Fanout Clock Buffers | |
3 | SI53301 |
Silicon Laboratories |
1:6 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR | |
4 | Si53302 |
Skyworks |
Ultra-Low Additive Jitter Fanout Clock Buffers | |
5 | SI53302 |
Silicon Laboratories |
1:10 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR | |
6 | Si53303 |
Skyworks |
Ultra-Low Additive Jitter Fanout Clock Buffers | |
7 | SI53303 |
Silicon Laboratories |
DUAL 1:5 LOW JITTER BUFFER/LEVEL TRANSLATOR | |
8 | Si53304 |
Skyworks |
Ultra-Low Additive Jitter Fanout Clock Buffers | |
9 | SI53304 |
Silicon Laboratories |
1:6 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR | |
10 | Si53305 |
Skyworks |
Ultra-Low Additive Jitter Fanout Clock Buffers | |
11 | SI53305 |
Silicon Laboratories |
1:10 LOW JITTER UNIVERSAL BUFFER/LEVEL TRANSLATOR | |
12 | Si53306 |
Skyworks |
Ultra-Low Additive Jitter Fanout Clock Buffers |