SCD1283 - Intel

SCD1283 IEEE 1284-Compatible Parallel Interface

at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The CD1283 may contain design defects or errors.

Features

Parallel Port (Peripheral-side) s s High-speed, bidirectional, multi-protocol parallel port: s Hardware implementation of all modes of the IEEE STD (Standard) 1284 specification (including automatic negotiation) — Centronics-compatible mode — Reverse Byte mode — Reverse Nibble mode — ECP (extended capabilities port) mode with run-length encoding/decoding — EPP (enhanced parallel port) mode — Up to 2-Mbytes/sec. transfer rate in ECP and EPP modes s 64-byte parallel FIFO with DMA interface — 64-byte FIFO can accommodate up to 4 Kbytes of compressed data with RLE (run-length encoded) compressio.