S-75V00ANC NOT RECOMMENDED FOR NEW DESIGN www.ablicinc.com © ABLIC Inc., 1999-2014 MINI LOGIC SERIES 2 INPUT NAND GATE Rev.4.0_01 The S-75V00ANC is a single 2-Input NAND Gate fabricated by utilizing advanced silicon-gate CMOS technology which provides the inherent benefit of CMOS low power consumption to achieve ultra high speed operation correspond to L.
Wide power supply range:
Low current consumption:
Typical propagation delay:
High noise immunity:
Power down protection:
Lead-free
2 V to 5.5 V
1.0 A max. (at 5.5 V, 25C)
tPD = 3.7 ns (at 5 V) VNIH = VNIL = 28% VCC min. All pins
Applications
Personal computers, peripherals
Cellular phones
Cameras
Games
Package
SC-88A
Pin Configuration
Marking Specification
IN B 1 IN A 2
5 VCC
54
5V1
Product code
GND 3
4 OUT Y
(Top view)
Logic Diagram
IN B IN A OUT Y
1 23 (Top view)
True values A L L H H
B L H L H
Y H H H L
1
MINI LOGIC SERIES 2 INPUT NAND GA.
S-75V00ANC www.sii-ic.com © Seiko Instruments Inc., 1999-2014 MINI LOGIC SERIES 2 INPUT NAND GATE Rev.4.0_00 The S-75.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | S-75V04ANC |
Seiko |
INVERTER | |
2 | S-75L00ANC |
Seiko |
2 INPUT NAND GATE | |
3 | S-75L02ANC |
Seiko |
Single 2-Input NOR Gate | |
4 | S-75L86ANC |
Seiko |
EXCLUSIVE OR GATE | |
5 | S-75LU04ANC |
Seiko |
Single INVERTER without Buffer | |
6 | S-7038AF |
Seiko Instruments Inc |
PAGING DECODER IC (POCSAG) | |
7 | S-7040D |
Seiko Instruments Inc |
PAGING DECODER IC (POCSAG) | |
8 | S-7041B |
Seiko Instruments Inc |
PAGING DECODER | |
9 | S-70L41B |
Seiko Instruments Inc |
PAGING DECODER | |
10 | S-7235 |
Seiko Instruments |
Pulse / DTMF Switchable Dialer | |
11 | S-7292AF |
Seiko Instruments Inc |
1-chip MICROCOMPUTER FOR TELEPHONE SET | |
12 | S-7600 |
ETC |
TCP/IP Network Protocol LSI |