1 VIN Input voltage pin 2 VSS GND pin 3 ON/OFF ON/OFF pin 4 NC*1 No connection 5 VOUT Output voltage pin *1. The NC pin is electrically open. The NC pin can be connected to VIN or VSS. Table 3 Pin No. Symbol Description 1 VOUT Output voltage pin 2 VSS GND pin 3 NC*1 No connection 4 ON/OFF ON/OFF pin 5 VIN Input voltage pin.
• Output voltage:
1.5 V to 5.5 V, selectable in 0.1 V step
• Input voltage:
2.0 V to 6.5 V
• Output voltage accuracy:
±1.0%
• Dropout voltage:
130 mV typ. (3.0 V output product, IOUT = 100 mA)
• Current consumption:
During operation: 20 μA typ., 40 μA max.
During power-off: 0.01 μA typ., 1.0 μA max.
• Output current:
Possible to output 300 mA (VIN ≥ VOUT(S) + 1.0 V)
*1
• Input and output capacitors:
A ceramic capacitor of 0.1 μF or more can be used.
• Ripple rejection:
70 dB typ. (f = 1.0 kHz)
• Built-in overcurrent protection circuit: Limits overcurrent of output transistor.
.
Input voltage pin GND pin Shutdown pin No connection Output voltage pin *1. The NC pin is electrically open. The NC pin.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | S-1131 |
ABLIC |
CMOS VOLTAGE REGULATOR | |
2 | S-1131 |
Seiko Instruments |
HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR | |
3 | S-1133 |
ABLIC |
CMOS VOLTAGE REGULATOR | |
4 | S-1133 |
Seiko Instruments |
HIGH RIPPLE-REJECTION AND LOW DROPOUT MIDDLE-OUTPUT CURRENT CMOS VOLTAGE REGULATOR | |
5 | S-1135 |
ABLIC |
CMOS VOLTAGE REGULATOR | |
6 | S-1135 |
Seiko |
High Ripple Rejection Low Dropout Middle Output Current CMOS Voltage Regulator | |
7 | S-1137 |
ABLIC |
CMOS VOLTAGE REGULATOR | |
8 | S-1111 |
Seiko Instruments |
(S-1111 / S-1121) HIGH RIPPLE-REJECTION LOW DROPOUT | |
9 | S-1112 |
ABLIC |
CMOS VOLTAGE REGULATOR | |
10 | S-1112 |
Seiko Instruments |
HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR | |
11 | S-1121 |
Seiko Instruments |
(S-1111 / S-1121) HIGH RIPPLE-REJECTION LOW DROPOUT | |
12 | S-1122 |
ABLIC |
CMOS VOLTAGE REGULATOR |