R5S56310CDFC - Renesas

R5S56310CDFC 100-MHz 32-bit RX MCU

 Maximum operating frequency: 100 MHz  32-bit RX CPU  Minimum instruction execution time: One instruction per state (cycle of the system clock)  Address space: 4-Gbyte linear  Register set of the CPU General purpose: Sixteen 32-bit registers Control: Nine 32-bit registers Accumulator: One 64-bit register  Basic instructions: 73  Floating-point instruc.

Features

RX63N Group, RX631 Group Renesas MCUs R01DS0098EJ0180 100-MHz 32-bit RX MCU, on-chip FPU, 165 DMIPS, up to 2-MB flash memory, various communications interfaces including Ethernet MAC, Rev.1.80 May 13, 2014 full-speed USB 2.0 host/function/OTG interface, CAN, 10- & 12-bit A/D converters, RTC Features RX63N Group products incorporate an Ethernet controller while RX631 Group products do not.
■ 32-bit RX CPU core
 Max. operating frequency: 100 MHz
 Capable of 165 DMIPS in operation at 100 MHz
 Single precision 32-bit IEEE-754 floating point
 Two types of multiply-and-accumulation unit .