Maximum operating frequency: 100 MHz 32-bit RX CPU Minimum instruction execution time: One instruction per state (cycle of the system clock) Address space: 4-Gbyte linear Register set of the CPU General purpose: Sixteen 32-bit registers Control: Nine 32-bit registers Accumulator: One 64-bit register Basic instructions: 73 Floating-point instruc.
RX63N Group, RX631 Group
Renesas MCUs
R01DS0098EJ0180
100-MHz 32-bit RX MCU, on-chip FPU, 165 DMIPS, up to 2-MB flash memory, various communications interfaces including Ethernet MAC,
Rev.1.80 May 13, 2014
full-speed USB 2.0 host/function/OTG interface, CAN, 10- & 12-bit A/D
converters, RTC
Features
RX63N Group products incorporate an Ethernet controller while RX631 Group products do not.
■ 32-bit RX CPU core
Max. operating frequency: 100 MHz
Capable of 165 DMIPS in operation at 100 MHz
Single precision 32-bit IEEE-754 floating point
Two types of multiply-and-accumulation unit .
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | R5F563NDCDFB |
Renesas |
100-MHz 32-bit RX MCU | |
2 | R5F563NDCDFC |
Renesas |
100-MHz 32-bit RX MCU | |
3 | R5F563NDCDFP |
Renesas |
100-MHz 32-bit RX MCU | |
4 | R5F563NDCDLC |
Renesas |
100-MHz 32-bit RX MCU | |
5 | R5F563NDCDLJ |
Renesas |
100-MHz 32-bit RX MCU | |
6 | R5F563NDCDLK |
Renesas |
100-MHz 32-bit RX MCU | |
7 | R5F563NDDDBG |
Renesas |
100-MHz 32-bit RX MCU | |
8 | R5F563NDDDFB |
Renesas |
100-MHz 32-bit RX MCU | |
9 | R5F563NDDDFC |
Renesas |
100-MHz 32-bit RX MCU | |
10 | R5F563NDDDFP |
Renesas |
100-MHz 32-bit RX MCU | |
11 | R5F563NDDDLC |
Renesas |
100-MHz 32-bit RX MCU | |
12 | R5F563NDDDLJ |
Renesas |
100-MHz 32-bit RX MCU |