R5F10WLF - Renesas

R5F10WLF MCU

Datasheet RL78/L13 RENESAS MCU R01DS0168EJ0210 Rev.2.10 Aug 12, 2016 Integrated LCD controller/driver, True Low Power Platform (as low as 112.5 μA/MHz, and 0.61 μA for RTC + LVD), 1.6 V to 5.5 V operation, 16 to 128 Kbyte Flash, 31 DMIPS at 24 MHz, for All LCD Based Applications 1. OUTLINE 1.1 Features Ultra-low power consumption technology • VDD = .

Features

Ultra-low power consumption technology
• VDD = single power supply voltage of 1.6 to 5.5 V which can operate a 1.8 V device at a low voltage
• HALT mode
• STOP mode
• SNOOZE mode RL78 CPU core
• CISC architecture with 3-stage pipeline
• Minimum instruction execution time: Can be changed from high speed (0.04167 µs: @ 24 MHz operation with high-speed onchip oscillator) to ultra-low speed (30.5 µs: @ 32.768 kHz operation with subsystem clock)
• Address space: 1 MB
• General-purpose registers: (8-bit register × 8) × 4 banks
• On-chip RAM: 1 to 8 KB Code flash memory
• Code flash memory: 16 to 12.