R5F101JHAFA - Renesas

R5F101JHAFA 16-Bit Single-Chip Microcontrollers

Datasheet RL78/G13 RENESAS MCU R01DS0131EJ0350 Rev.3.50 Jun 30, 2020 True low-power platform (66 μA/MHz, and 0.57 μA for operation with only RTC and LVD) for the general-purpose applications, with 1.6-V to 5.5-V operation, 16- to 512-Kbyte code flash memory, and 41 DMIPS at 32 MHz 1. OUTLINE 1.1 Features Ultra-low power consumption technology  VDD = s.

Features

Ultra-low power consumption technology
 VDD = single power supply voltage of 1.6 to 5.5 V
 HALT mode
 STOP mode
 SNOOZE mode RL78 CPU core
 CISC architecture with 3-stage pipeline
 Minimum instruction execution time: Can be changed from high speed (0.03125 μs: @ 32 MHz operation with high-speed on-chip oscillator) to ultra-low speed (30.5 μs: @ 32.768 kHz operation with subsystem clock)
 Address space: 1 MB
 General-purpose registers: (8-bit register × 8) × 4 banks
 On-chip RAM: 2 to 32 KB Code flash memory
 Code flash memory: 16 to 512 KB
 Block size: 1 KB
 Prohibition of blo.