PI90LVT211 - Pericom Semiconductor Corporation

PI90LVT211 1:6 Differential Clock Distribution Chip

The PI90LV211 implements low voltage differential signaling (LVDS) to achieve clocking rates as high as 320 MHz with low skew. The PI90LV211 is a low skew 1:6 fanout device designed explicitly for low skew clock distribution applications. The device features a multiplexed clock input to allow for the distribution of a lower speed scan or test clock with the .

Features

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• Meets or Exceeds Requirements of ANSI TIA/EIA-644-1995 Designed for Clocking Rates up to 320MHz Operates from a single 3.3-V Supply Low-Voltage Differential Signaling (LVDS) with Output Voltages of ±350mV into a 100-ohm load Choice between LVDS or TTL clock input Synchronous Enable/Disable Multiplexed clock input
  – Internal 300 kohm pullup resistor on all control pins
  – CLK and CLK have 110-ohm termination (PI90LVT211) Common and individual Enable/Disable control 50ps Output-to-Output Skew ±24ps Period Jitter Bus Pins are High Impedance when disabled or with VCC <1.5V TTL Inputs .