Eng Chk Mkt Chk This release reflects PLX part numbering. • Changed S_IDEN signal to reserved • Added operating ambient temperature information PCI 6140 Data Book v2.0 2003 PLX Technology, Inc. All rights reserved. 6 Contents HISTORY ------------------------------------------------------------------------------------------------------ 6 1 PIN DIAGRAM.
PC99 Power Management D3 Cold Wakeup Capable
* Very efficient, low power, low cost and easy to use PCI ClockRun support. Optional Zero clock latency when bursting data across PCI 6140 to preserve maximum data rate PCI compatible cycle completion without PCI Retry penalty of a traditional PCI bridge
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Legacy VGA and Audio IO address support Provides arbitration support for 4 bus masters on secondary interface Supports PCI Type 1 to Type 0 and Type 1 configuration command conversion Supports 1-Clock Latency Mode Synchronous Primary and Secondary Ports 128-pin PQFP package
Secondary P.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | PCI6150 |
PLX Technology |
PCI to PCI Bridge | |
2 | PCI6154 |
PLX Technology |
PCI to PCI Bridge | |
3 | PCI6156 |
PLX Technology |
PCI to PCI Bridge | |
4 | PCI60 |
Allied Components International |
Power Chip Inductors | |
5 | PCI6254 |
PLX Technology |
Dual Mode PCI to PCI Bridge | |
6 | PCI6350 |
PLX Technology |
PCI to PCI Bridge | |
7 | PCI6411 |
Texas Instruments |
CardBus and UltraMedia Controller | |
8 | PCI6420 |
Texas Instruments |
Dual Socket CardBus and Smart Card Controller | |
9 | PCI6421 |
Texas Instruments |
CardBus and UltraMedia Controller | |
10 | PCI6520 |
PLX Technology |
PCI to PCI Bridge | |
11 | PCI6540 |
PLX Technology |
PCI to PCI Bridge | |
12 | PCI6611 |
Texas Instruments |
CardBus and UltraMedia Controller |