The P4C150 is a 4,096-bit ultra high-speed static RAM organized as 1K x 4 for high speed cache applications. The RAM features a reset control to enable clearing all words to zero within two cycle times. The CMOS memory requires no clocks or refreshing, and has equal access and cycle times. Inputs and outputs are fully TTLcompatible. The RAM operates from a s.
Full CMOS, 6T Cell High Speed (Equal Access and Cycle Times)
– 10/12/15/20/25 ns (Commercial)
– 15/20/25/35 ns (Military)
Chip Clear Function
Low Power Operation
Single 5V ± 10% Power Supply
Separate Input and Output Ports
Three-State Outputs
Fully TTL Compatible Inputs and Outputs
Standard Pinout (JEDEC Approved)
– 24-Pin 300 mil DIP
– 24-Pin 300 mil SOIC
– 28-Pin LCC (350 x 550 mils)
– 24-Pin CERPACK
DESCRIPTION
The P4C150 is a 4,096-bit ultra high-speed static RAM organized as 1K x 4 for high speed cache applications. The RAM features a reset control to enable clearing all words to zero w.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | P4C1023 |
Pyramid Semiconductor |
LOW POWER 128K x 8 SINGLE CHIP ENABLE CMOS STATIC RAM | |
2 | P4C1023L |
Pyramid Semiconductor |
LOW POWER 128K x 8 SINGLE CHIP ENABLE CMOS STATIC RAM | |
3 | P4C1024 |
PYRAMID |
HIGH SPEED 128K x 8 DUAL CHIP ENABLE CMOS STATIC RAM | |
4 | P4C1024 |
ETC |
HIGH SPEED 128K X 8 CMOS STATIC RAM | |
5 | P4C1024L |
Pyramid Semiconductor |
LOW POWER 128K x 8 CMOS STATIC RAM | |
6 | P4C1026 |
Pyramid Semiconductor |
ULTRA HIGH SPEED 256K x 4 STATIC CMOS RAM | |
7 | P4C1041 |
PYRAMID |
HIGH SPEED 256K x 16 (4 MEG) STATIC CMOS RAM | |
8 | P4C1041L |
PYRAMID |
STATIC CMOS RAM | |
9 | P4C1048L |
PYRAMID |
LOW POWER 512K x 8 CMOS STATIC RAM | |
10 | P4C1049 |
PYRAMID |
HIGH SPEED 512K x 8 STATIC CMOS RAM | |
11 | P4C1049L |
PYRAMID |
HIGH SPEED 512K x 8 STATIC CMOS RAM | |
12 | P4C104xxx |
Vishay |
Tantalum Electrolytic Capacitors |