......7 FPGA Overview ...........7 PLC Logic ......7 PIC Logic .......8 System Features ...
■
■
■
■
■
■
■
■
■
■
■
High-performance, cost-effective, 0.35 µm (OR3C) and 0.3 µm (OR3T) 4-level metal technology, (4- or 5-input look-up table delay of 1.1 ns with -7 speed grade in 0.3 µm). Same basic architecture as lower-voltage, advanced process technology Series 3 architectures. (See ORCA Series 3L FPGA documentation.) Up to 186,000 usable gates. Up to 452 user I/Os. (OR3Txxx I/Os are 5 V tolerant to allow interconnection to both 3.3 V and 5 V devices, selectable on a per-pin basis.) Pin selectable I/O clamping diodes provide 5 V or 3.3 V PCI compliance and 5 V tolerance on OR3.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | OR3T125 |
Agere Systems |
3C and 3T Field-Programmable Gate Arrays | |
2 | OR3T125 |
Lattice Semiconductor |
(OR3xxx) 3C and 3T Field-Programmable Gate Arrays | |
3 | OR3T20 |
Agere Systems |
3C and 3T Field-Programmable Gate Arrays | |
4 | OR3T20 |
Lattice Semiconductor |
(OR3xxx) 3C and 3T Field-Programmable Gate Arrays | |
5 | OR3T30 |
Agere Systems |
3C and 3T Field-Programmable Gate Arrays | |
6 | OR3T30 |
Lattice Semiconductor |
(OR3xxx) 3C and 3T Field-Programmable Gate Arrays | |
7 | OR3T55 |
Agere Systems |
3C and 3T Field-Programmable Gate Arrays | |
8 | OR3TP12 |
Agere Systems |
Field-Programmable System Chip (FPSC) Embedded Master/Target PCI Interface | |
9 | OR3005230W |
PDI |
Superior return loss performance | |
10 | OR31 |
AMI |
CMOS Gate Array | |
11 | OR32 |
AMI |
CMOS Gate Array | |
12 | OR34 |
AMI |
CMOS Gate Array |