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NCP731 - ON Semiconductor

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NCP731 LDO Regulator

Pin Number Pin Name Description 8 IN Power supply input pin. 4 GND Ground pin. 1 OUT LDO output pin. 5 EN Enable input pin (high = enable, low = disable). If this pin is not needed it should be conned to IN pin. No internal pull−up or pull−down circuit is present. 2 ADJ/FF ADJ version – pin is ADJ • Adjust input pin. Could be connected directl.

Features


  – very low noise, low quiescent current, fast transient response and high input and output voltage ranges. The NCP731 is CMOS LDO regulator designed for up to 38 V input voltage and 150 mA output current. Very low noise (8 mVRMS) makes this device an ideal solution for application where clean voltage rails are critical for system performance (power operational amplifiers, analog−to−digital / digital−to−analog converters and other precision analog circuitry). Internal short circuit and over temperature protections saves the device against overload conditions. Features
• Operating Input Voltage .

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