NB3V8312C - ON Semiconductor

NB3V8312C Ultra-Low Jitter Low Skew 1:12 LVCMOS - LVTTL Fanout Buffer

Pin 1, 5, 8, 12, 16, 17, 21, 25, 29 2, 7 3 Name GND VDD CLK_EN I/O Power Power Input High Open Default Description Ground, Negative Power Supply Positive Supply for Core and Inputs Synchronous Clock Enable Input. When High, outputs are enabled. When Low, outputs are disabled Low. Internal Pullup Resistor. Single−ended Clock input; LVCMOS/LVTTL. Internal Pull.

Features

http://onsemi.com 1 LQFP−32 FA SUFFIX CASE 873A VDDO VDD GND RPU CLK_EN D Q 32 QFN32 MN SUFFIX CASE 488AM Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 Q8 Q9 Q10 Q11 CLK RPD
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• VDD (Core) / VDDO (Outputs) 3.3 V / 3.3 V 3.3 V / 2.5 V 3.3 V / 1.8 V 2.5 V / 2.5 V 2.5 V / 1.8 V 1.8 V / 1.8 V 250 MHz Maximum Clock Frequency Accepts LVCMOS, LVTTL Clock Inputs LVCMOS Compatible Control Inputs 12 LVCMOS Clock Outputs Synchronous Clock Enable Output Enable to High Z State Control 150 ps Max. Skew Between Outputs Temp. Range −40°C to +85°C 32−pin LQFP and QFN Packages These are .