MM74HCT138 - Fairchild

MM74HCT138 3-to-8 Line Decoder

The MM74HCT138 decoder utilizes advanced silicon-gate CMOS technology, and are well suited to memory address decoding or data routing applications. Both circuits feature high noise immunity and low power consumption usually associated with CMOS circuitry, yet have speeds comparable to low power Schottky TTL logic. The MM74HCT138 have 3 binary select inputs (.

Features

s TTL input compatible s Typical propagation delay: 20 ns s Low quiescent current: 80 µA maximum (74HCT Series) s Low input current: 1 µA maximum s Fanout of 10 LS-TTL loads Ordering Code: Order Number MM74HCT138M MM74HCT138SJ MM74HCT138MTC MM74HCT138N Package Number M16A M16D MTC16 N16E Package Description 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Dev.