This high speed latch decoder driver utilizes advanced silicon-gate CMOS technology It has the high noise immunity and low power consumption of standard CMOS integrated circuits as well as the ability to drive 10 LS-TTL loads The circuit provides the functions of a 4-bit storage latch an 8421 BCD-to-seven segment decoder and an output drive capability Lamp t.
Y Y Y Y Y Y Y Latch storage of input data Blanking input Lamp test input Low power consumption characteristics of CMOS devices Wide operating voltage range 2 to 6 volts Low input current 1 mA maximum Low quiescent current 80 mA maximum over full temperature range (74 Series) Connection Diagram Dual-In-Line Package Truth Table INPUTS OUTPUTS LE BI LT D C B A a b c d e f g DISPLAY x x L L L L L L L L L L L L L L L L H x L H H H H H H H H H H H H H H H H H L H H H H H H H H H H H H H H H H H H x x L L L L L L L L H H H H H H H H x x x L L L L H H H H L L L L H H H H x x x L L H H L L H H L L.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | MM54HC4543 |
National Semiconductor |
BCD-to-7 Segment Latch/Decoder/Driver | |
2 | MM54HC4016 |
National Semiconductor |
Quad Analog Switch | |
3 | MM54HC4017 |
National Semiconductor |
Decade Counter/Divider | |
4 | MM54HC4020 |
National Semiconductor |
14-Stage Binary Counter | |
5 | MM54HC4040 |
National Semiconductor |
12-Stage Binary Counter | |
6 | MM54HC42 |
National Semiconductor |
BCD-to-Decimal Decoder | |
7 | MM54HC00 |
National Semiconductor |
Quad 2-Input NAND Gate | |
8 | MM54HC11 |
National |
Triple 3-Input AND Gate | |
9 | MM54HC112 |
National Semiconductor |
Dual J-K Flip-Flop | |
10 | MM54HC123A |
National |
Dual Retriggerable Monostable Multivibrator | |
11 | MM54HC123A |
ETCTI |
MM54HC123A MM74HC123A Dual Retriggerable Monostable Multivibrator (Rev. A) | |
12 | MM54HC133 |
National Semiconductor |
13-Input NAND Gate |