This priority encoder utilizes advanced silicon-gate CMOS technology It has the high noise immunity and low power consumption typical of CMOS circuits as well as the speeds and output drive similar to LB-TTL This priority encoder accepts 8 input request lines 0– 7 and outputs 3 lines A0–A2 The priority encoding ensures that only the highest order data line i.
Y Y
Typical propagation delay 13 ns Wide supply voltage range 2V
– 6V
Connection Diagram
Dual-In-Line Package
TL F 9390
– 1
Order Number MM54HC148 or MM74HC148
Truth Table
Inputs EI H L L L L L L L L L 0 X H X X X X X X X L 1 X H X X X X X X L H 2 X H X X X X X L H H 3 X H X X X X L H H H 4 X H X X X L H H H H 5 X H X X L H H H H H 6 X H X L H H H H H H 7 X H L H H H H H H H Outputs A2 A1 A0 GS EO H H L L L L H H H H H H L L H H L L H H H H L H L H L H L H H H L L L L L L L L H L H H H H H H H H
H e High L e Low X e irrelevant
C1995 National Semiconductor Corporation
TL F 9390
RRD-B30.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | MM54HC147 |
National Semiconductor |
10-to-4 Line Priority Encoder | |
2 | MM54HC11 |
National |
Triple 3-Input AND Gate | |
3 | MM54HC112 |
National Semiconductor |
Dual J-K Flip-Flop | |
4 | MM54HC123A |
National |
Dual Retriggerable Monostable Multivibrator | |
5 | MM54HC123A |
ETCTI |
MM54HC123A MM74HC123A Dual Retriggerable Monostable Multivibrator (Rev. A) | |
6 | MM54HC133 |
National Semiconductor |
13-Input NAND Gate | |
7 | MM54HC160 |
National Semiconductor |
Synchronous Binary Counter | |
8 | MM54HC161 |
National Semiconductor |
Synchronous Binary Counter | |
9 | MM54HC162 |
National Semiconductor |
Synchronous Binary Counter | |
10 | MM54HC163 |
National Semiconductor |
Synchronous Binary Counter | |
11 | MM54HC174 |
National Semiconductor |
Hex D Flip-Flops | |
12 | MM54HC190 |
National Semiconductor |
(MM54HC190 / MM54HC191) Up/Down Counters |