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MC68HRC08JK3E - Freescale Semiconductor

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MC68HRC08JK3E Microcontroller

Table 4-1. Instruction Set Summary — Updated table to include the WAIT instruction. 5.7.1 Break Status Register (BSR) — Updated for clarity. 5.7.2 Reset Status Register (RSR) — Updated description for clarity. 7.4 Security — Updated to reflect the correct RAM location ($80) to determine if the security code has been entered correctly. 8.9.1 TIM Status and Co.

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ge number designators have been linked to the appropriate location. Revision History Date October 2006 Nov 2004 Dec 2002 May 2002 Revision Level 4 3 2 1 Description Table 4-1. Instruction Set Summary — Updated table to include the WAIT instruction. 5.7.1 Break Status Register (BSR) — Updated for clarity. 5.7.2 Reset Status Register (RSR) — Updated description for clarity. 7.4 Security — Updated to reflect the correct RAM location ($80) to determine if the security code has been entered correctly. 8.9.1 TIM Status and Control Register (TSC) — Added note to definition of TSTOP bit. 10.1 Intr.

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