MC44864 - Motorola

MC44864 PLL TUNING CIRCUIT WITH 1.3 GHz PRESCALER AND D/A CONVERTERS

Pin 6, 7, 8 9 10, 11 12, 20 13 14, 15, 16, 17 18 19 1 2 3 4 5 Symbol DA1, DA2, DA3 VCC1 HF1, HF2 Gnd CA B1, B3, B5, B7 SCL SDA XTAL PHO Amp In VCC2 VTUN D/A output control voltages Positive supply of the circuit (except DACs) HF input from local oscillator Ground Chip Address Band buffer output can drive 15 mA Clock input (supplied by the microprocessor via .

Features

and function of the internal blocks is given below. Automatic Tuner Alignment The circuit generates the tuning voltage through the PLL. The output voltages of the D/A converters are equal to the tuning voltage plus a positive or negative offset of up to 31 steps. During the automatic alignment one first lets the PLL lock to the appropriate frequency and then searches for the optimum value of the other varactor voltages. The digital word for each voltage value is stored in a nonvolatile memory (NVM). Hence, for each frequency point to be adjusted, three times 6 bits of information have to be st.