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MC10H210 - ON Semiconductor

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MC10H210 Dual 3-Input 3-Output OR Gate

The MC10H210 is designed to drive up to six transmission lines simultaneously. The multiple outputs of this device also allow the wire ORing of several levels of gating for minimization of gate and package count. The ability to control three parallel lines with minimum propagation delay from a single point makes the MC10H210 particularly useful in clock dis.

Features

http://onsemi.com MARKING DIAGRAMS
* 16 MC10H210L AWLYYWW CDIP−16 L SUFFIX CASE 620A 1
• Propagation Delay Average, 1.0 ns Typical
• Power Dissipation, 160 mW Typical
• Improved Noise Margin 150 mV (Over Operating Voltage and
• Voltage Compensated
• MECL 10K™ Compatible
• Pb−Free Packages are Available
* LOGIC DIAGRAM 5 6 7 2 3 4 12 13 14 Temperature Range) 16 16 1 PDIP−16 P SUFFIX CASE 648 1 MC10H210P AWLYYWWG 9 10 11 10H210 ALYWG DIP PIN ASSIGNMENT VCC1 AOUT AOUT AOUT AIN AIN AIN VEE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC2 VCC1 BOUT BOUT BOUT BIN BIN BIN VCC1 = PINS 1, 15 VCC2 = PI.

The same part from a different manufacturer

Datasheet MC10H210 - Motorola MC10H210

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual 3-Input 3-Output OR Gate The MC10H210 is designed to drive up to six transm.

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