The MC10H210 is designed to drive up to six transmission lines simultaneously. The multiple outputs of this device also allow the wire ORing of several levels of gating for minimization of gate and package count. The ability to control three parallel lines with minimum propagation delay from a single point makes the MC10H210 particularly useful in clock dis.
http://onsemi.com MARKING DIAGRAMS
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16 MC10H210L AWLYYWW CDIP−16 L SUFFIX CASE 620A 1
• Propagation Delay Average, 1.0 ns Typical
• Power Dissipation, 160 mW Typical
• Improved Noise Margin 150 mV (Over Operating Voltage and
• Voltage Compensated
• MECL 10K™ Compatible
• Pb−Free Packages are Available
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LOGIC DIAGRAM
5 6 7 2 3 4 12 13 14
Temperature Range)
16 16 1 PDIP−16 P SUFFIX CASE 648 1 MC10H210P AWLYYWWG
9 10 11
10H210 ALYWG
DIP PIN ASSIGNMENT
VCC1 AOUT AOUT AOUT AIN AIN AIN VEE 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC2 VCC1 BOUT BOUT BOUT BIN BIN BIN
VCC1 = PINS 1, 15 VCC2 = PI.
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual 3-Input 3-Output OR Gate The MC10H210 is designed to drive up to six transm.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | MC10H211 |
Motorola |
Dual 3-Input 3-Output NOR Gate | |
2 | MC10H211 |
ON Semiconductor |
Dual 3-Input 3-Output NOR Gate | |
3 | MC10H209 |
ON Semiconductor |
Dual 4-5- Input OR/NOR Gate | |
4 | MC10H209 |
Motorola |
Dual 4-5- Input OR/NOR Gate | |
5 | MC10H016 |
ON Semiconductor |
4-Bit Binary Counter | |
6 | MC10H016 |
Motorola |
4-Bit Binary Counter | |
7 | MC10H100 |
ON Semiconductor |
Quad 2 - input NOR GATE With strobe | |
8 | MC10H100 |
Motorola |
Quad 2-Input NOR Gate | |
9 | MC10H101 |
ON Semiconductor |
Quad OR/NOR Gate | |
10 | MC10H101 |
Motorola |
Quad OR/NOR Gate | |
11 | MC10H102 |
ON Semiconductor |
Quad 2-Input NOR Gate | |
12 | MC10H102 |
Motorola |
Quad 2-Input NOR Gate |