The MC10E/100E452 is a 5-bit differential register with differential data (inputs and outputs) and clock. The registers are triggered by a positive transition of the positive clock (CLK) input. A high on the Master Reset (MR) asynchronously resets all registers so that the Q outputs go LOW. The differential input structures are clamped so that the inputs of .
• Differential D, CLK and Q; VBB Reference Available
• 1100 MHz Min. Toggle Frequency
• Asynchronous Master Reset
• PECL Mode Operating Range:
♦ VCC = 4.2 V to 5.7 V with VEE = 0 V
• NECL Mode Operating Range:
♦ VCC = 0 V with VEE = −4.2 V to −5.7 V
• Internal Input 50 kW Pulldown Resistors, Output Q3 will Default to
Low State When Inputs Are Left Open
• ESD Protection:
♦ Human Body Model; > 2 kV ♦ Machine Model; > 200 V ♦ Charged Device Model; > 2 kV
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity Level: 3 (Pb-Free)
♦ For Additional Information, see Application.
MOTOROLA SEMICONDUCTOR TECHNICAL DATA 5ĆBit Differential Register The MC10E/100E452 is a 5-bit differential register w.
No. | Partie # | Fabricant | Description | Fiche Technique |
---|---|---|---|---|
1 | MC100E451 |
ON Semiconductor |
6-BIT D REGISTER DIFFERENTIAL DATA AND CLOCK | |
2 | MC100E451 |
Motorola |
6-BIT D REGISTER DIFFERENTIAL DATA AND CLOCK | |
3 | MC100E457 |
Motorola |
TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER | |
4 | MC100E457 |
ON Semiconductor |
TRIPLE DIFFERENTIAL 2:1 MULTIPLEXER | |
5 | MC100E404 |
ON Semiconductor |
QUAD DIFFERENTIAL AND/NAND | |
6 | MC100E404 |
Motorola |
QUAD DIFFERENTIAL AND/NAND | |
7 | MC100E416 |
Motorola |
QUINT DIFFERENTIAL LINE RECEIVER | |
8 | MC100E416 |
ON Semiconductor |
QUINT DIFFERENTIAL LINE RECEIVER | |
9 | MC100E431 |
ON Semiconductor |
3-BIT DIFFERENTIAL FLIP-FLOP | |
10 | MC100E431 |
Motorola |
3-BIT DIFFERENTIAL FLIP-FLOP | |
11 | MC100E445 |
ON Semiconductor |
4-BIT SERIAL/ PARALLEL CONVERTER | |
12 | MC100E445 |
Motorola |
4-BIT SERIAL / PARALLEL CONVERTER |