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The MACH120 is a member of the high-performance EE CMOS MACH ® 1 family. This device has approximately five times the logic macrocell capability of the popular PALCE22V10 without loss of speed. The MACH120 consists of four PAL® blocks interconnected by a programmable switch matrix. The switch matrix connects the PAL blocks to each other and to all input pins,.
efficiently. The MACH120 macrocell provides either registered or combinatorial outputs with programmable polarity. If a registered configuration is chosen, the register can be configured as D-type or T-type to help reduce the number of product terms. The register type decision can be made by the designer or by the software. All macrocells can be connected to an I/O cell. If a buried macrocell is desired, the internal feedback path from the macrocell can be used, which frees up the I/O pin for use as an input. Publication# 14129 Amendment/0 Rev: J Issue Date: November 1997 BLOCK DIAGRAM Block A.
| No. | Partie # | Fabricant | Description | Fiche Technique |
|---|---|---|---|---|
| 1 | MACH120-15 |
Lattice |
High-Performance EE CMOS Programmable Logic |
|
| 2 | MACH1 |
Lattice |
High-Performance EE CMOS Programmable Logic |
|
| 3 | MACH110-12 |
Advanced Micro Devices |
High-Density EE CMOS Programmable Logic |
|
| 4 | MACH110-12 |
Lattice |
High-Density EE CMOS Programmable Logic |
|
| 5 | MACH110-15 |
Advanced Micro Devices |
High-Density EE CMOS Programmable Logic |
|
| 6 | MACH110-15 |
Lattice |
High-Density EE CMOS Programmable Logic |
|
| 7 | MACH110-20 |
Advanced Micro Devices |
High-Density EE CMOS Programmable Logic |
|
| 8 | MACH110-20 |
Lattice |
High-Density EE CMOS Programmable Logic |
|
| 9 | MACH111 |
Lattice Semiconductor |
High-Performance EE CMOS Programmable Logic |
|
| 10 | MACH111-10 |
Advanced Micro Devices |
High-Performance EE CMOS Programmable Logic |
|
| 11 | MACH111-12 |
Advanced Micro Devices |
High-Performance EE CMOS Programmable Logic |
|
| 12 | MACH111-14 |
Advanced Micro Devices |
High-Performance EE CMOS Programmable Logic |
|