M80C186 - Intel

M80C186 CHMOS HIGH INTEGRATION 16-BIT MICROPROCESSOR

Symbol VCC VCC VSS VSS RESET PGA 9 43 26 60 57 QFP 1 35 52 18 21 Type I I O Name and Function System Power a 5 volt power supply System Ground Reset Output indicates that the M80C186 CPU is being reset and can be used as a system reset It is active HIGH synchronized with the processor clock and lasts an integer number of clock periods corresponding to the le.

Features

which are new to the M80186 family which include a DRAM refresh control unit power-save mode and a direct numerics interface When used in ‘‘compatible’’ mode the M80C186 is 100% pin-for-pin compatible with the NMOS M80186 (except for M8087 applications) The ‘‘enhanced’’ mode of operation allows the full feature set of the M80C186 to be used The M80C186 is upward compatible with M8086 and M8088 software and fully compatible with M80186 and M80188 software 270500
  – 1 Figure 1 M80C186 Block Diagram November 1993 Order Number 270500-008 M80C186 Pin Grid Array 270500
  – 30 Quad Flat Pack 27.